PROGRAMMABLE EQUALIZATION WITH COMPENSATED IMPEDANCE

Patent №

US 9,048,824

Granted

2015-06-02

Filed 2012

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13712574

Described is a chip comprising: a pull-up driver with a first impedance, the pull-up driver coupled to a node; a pull-down driver with a second impedance, the pull-down driver coupled to the node; and an equalizer coupled to the pull-up and pull-down drivers, wherein the equalizer is operable to be trained to deemphasize a signal driven on the node while maintaining the first and second impedances substantially constant.

AI hardwareH03K 19/0005G11C 7/1048G11C 7/1051H04L 25/0278H04L 25/0298

AI classification

AI hardware0.73
Machine learning0.08
Vision0.01
Speech0.00
Natural language0.00
Planning0.00
Evolutionary computation0.00
Knowledge representation0.00

Ownership

INTEL CORPORATION

assignment · 300800406

Assignors

CHAN, HONG H., STRAYER, JAYSON D., HUA, MY M.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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