SYSTEM AND METHOD FOR CONTROLLING CENTRAL PROCESSING UNIT POWER WITH GUARANTEED TRANSIENT DEADLINES

Patent №

US 9,104,411

Granted

2015-08-11

Filed 2012

Owner

QUALCOMM INCORPORATED

Lab

AI components

2

kr · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13669043

Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees to ensure that a processor does not remain in a busy state (e.g., due to transient workloads) for more than a predetermined amount of time above that which is required for that processor to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of a processor based on a variable delay to ensure that the processing core only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processor.

Knowledge representationAI hardwareG06F 1/3203G06F 1/324G06F 1/3296G06F 1/26G06F 1/32G06F 9/5094Y02D 10/00

AI classification

AI hardware1.00
Knowledge representation0.74
Planning0.29
Machine learning0.01
Natural language0.00
Evolutionary computation0.00
Vision0.00
Speech0.00

Ownership

QUALCOMM INCORPORATED

assignment · 296870183

Assignors

THOMSON, STEVEN S., RYCHLIK, BOHUSLAV, IRANLI, ALI, SUR, SUMIT, GARGASH, NORMAN SCOTT

On an employer assignment, the assignors are typically the inventors.

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