MANAGING READ/WRITE LOCKS FOR MULTIPLE CPU CORES FOR EFFICIENT ACCESS TO STORAGE ARRAY RESOURCES

Patent №

US 9,201,802

Granted

2015-12-01

Filed 2012

Owner

EMC CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13731197

A technique for managing resources on a storage array having multiple CPU cores releases share locks on a resource by decrementing share lock counters associated with the CPU cores that release the share locks, regardless of whether these are the same as the CPU cores that acquired the share locks. As each CPU core changes its own share lock counter, cache trashing caused by changing share lock counters associated with other CPU cores can be avoided.

AI hardwareG06F 12/0875G06F 12/126G06F 9/526G06F 12/084G06F 12/0261

AI classification

AI hardware1.00
Knowledge representation0.15
Planning0.09
Natural language0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00
Vision0.00

Ownership

EMC CORPORATION

assignment · 298280554

Assignors

ARMANGAU, PHILIPPE, SEIBEL, CHRIS, HASSEY, JOHN A., WANG, YUBING

On an employer assignment, the assignors are typically the inventors.

From the same owner

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