REDUCED BITCOUNT POLYGON RASTERIZATION

Patent №

US 9,218,679

Granted

2015-12-22

Filed 2012

Owner

INTEL CORPORATION

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13647071

Techniques are disclosed for carrying out rasterization of a given graphics workload, wherein portions of the workload associated with relatively high bit count operations are processed via a first process path, and portions of the workload associated with relatively lower bit count operations are processed via a second, relatively faster process path, in accordance with an embodiment. In a more general sense, maximal bit count associated with a given primitive can be identified and compared to a threshold to determine which one of multiple available processing paths can be used.

PlanningG06T 11/40G06T 15/10G06T 2210/12

AI classification

Planning0.62
AI hardware0.26
Knowledge representation0.03
Vision0.00
Machine learning0.00
Speech0.00
Evolutionary computation0.00
Natural language0.00

Ownership

INTEL CORPORATION

assignment · 291290327

Assignors

SUBAG, JACOB, BENTY, NIR

On an employer assignment, the assignors are typically the inventors.

From the same owner

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