METHOD AND APPARATUS FOR OPERATING FINITE-STATE MACHINES IN CONFIGURABLE STORAGE CIRCUITS

An integrated circuit may have circuitry that includes a storage circuit, a processing circuit, and at least one state register to implement a finite-state machine. The storage circuit may store base addresses and output data for each state of the finite-state machine. The storage circuit may further store offset values that are based on the input data to the finite-state machine and the state transition from a current state to a next state caused by the input data. The processing circuit may compute the address of the storage circuit location where the output data of the next state is stored. The computation of this address may depend on the offset value and base address of the current state. The state register may receive the address from the processing circuit, store the address, and perform the corresponding memory access operation on the storage circuit.