DEBUG INSTRUCTION SET ALLOCATION ACCORDING TO PROCESSOR OPERATING STATE

Patent №

US 9,355,014

Granted

2016-05-31

Filed 2011

Owner

ARM LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13137375

A data processing apparatus is provided comprising data processing circuitry and debug circuitry. The debug circuitry controls operation of the processing circuitry when operating in a debug mode. The data processing circuitry determines upon entry into a debug mode a current operating state of the data processing apparatus. The data processing circuitry allocates one of a plurality of instruction sets to be used as a debug instruction set depending upon the determined current operating state.

AI hardwareG06F 11/3644G06F 9/3004G06F 9/30112G06F 9/30149G06F 9/30189G06F 9/45554G06F 11/3648

AI classification

AI hardware0.98
Natural language0.00
Knowledge representation0.00
Planning0.00
Vision0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00

Ownership

ARM LIMITED

assignment · 267820064

Assignors

WILLIAMS, MICHAEL JOHN, GRISENTHWAITE, RICHARD ROY, CRASKE, SIMON JOHN

On an employer assignment, the assignors are typically the inventors.

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