Retention priority based cache replacement policy

Patent №

US 9,372,811

Granted

2016-06-21

Filed 2012

Owner

ARM LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13713999

A data processing system includes a cache memory 58 and cache control circuitry 56 for applying a cache replacement policy based upon a retention priority value PV stored with each cache line 66 within the cache memory 58. The initial retention priority value set upon inserting a cache line 66 into the cache memory 58 is dependent upon either or both of which of a plurality of sources issued the access memory request that resulted in the insertion or the privilege level of the memory access request resulting in the insertion. The initial retention priority level of cache lines resulting from instruction fetches may be set differently from cache lines resulting from data accesses.

AI hardwareG06F 12/126G06F 12/08

AI classification

AI hardware0.99
Knowledge representation0.03
Evolutionary computation0.00
Natural language0.00
Planning0.00
Machine learning0.00
Vision0.00
Speech0.00

Ownership

ARM LIMITED

assignment · 301010517

Assignors

RAMRAKHYANI, PRAKASH SHYAMLAL, SAIDI, ALI GHASSAN

On an employer assignment, the assignors are typically the inventors.

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