METHOD AND APPARATUS FOR BRANCH PREDICTION

A branch prediction unit BPU (500) for prediction of a next taken branch instruction in a processing unit (100). The BPU (500) comprises a pattern history memory (504) comprising branch source addresses and branch indicators; a branch target buffer (506) comprising branch targets; and branch prediction logical circuit (502). By means of a search PC, the circuit finds in the memory a branch indicator indicating a predicted taken branch instruction. The circuit selects a first found branch indicator as an indication of a first predicted taken branch instruction. Using the first found branch indicator, the circuit retrieves from the memory, a branch source address of the first predicted taken branch instruction. When the retrieved branch source address is the branch source address nearest to the search PC, the circuit outputs as next PC a branch target retrieved from the buffer. Then the prediction stops.