MULTIPLE SPLIT RAIL STANDARD CELL LIBRARY ARCHITECTURE

Patent №

US 9,502,351

Granted

2016-11-22

Filed 2015

Owner

QUALCOMM INCORPORATED

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14855240

A MOS device includes first and second sets of power rails. The first set of power rails extends across the MOS device and includes at least two power rails for providing a first voltage to the MOS device. The first set of power rails is interior to an edge of a cell boundary in the MOS device. At least one power rail of the first set of power rails extends over a pMOS active region of the MOS device. The second set of power rails extends across the MOS device and includes at least two power rails for providing a second voltage to the MOS device. The second set of power rails is interior to an edge of the cell boundary in the MOS device. At least one power rail of the second set of power rails extends over an nMOS active region of the MOS device.

PlanningH01L 23/5286H10W 20/427H10D 84/907H10D 89/10H10D 30/62H10D 84/85H10D 84/981

AI classification

Planning0.95
AI hardware0.01
Natural language0.01
Vision0.00
Evolutionary computation0.00
Speech0.00
Knowledge representation0.00
Machine learning0.00

Ownership

QUALCOMM INCORPORATED

assignment · 373920462

Assignors

SAHU, SATYANARAYANA

On an employer assignment, the assignors are typically the inventors.

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