PROCESSING CHAMBER ALLOCATION SETTING DEVICE AND PROCESSING CHAMBER ALLOCATION SETTING PROGRAM

Patent №

US 9,507,328

Granted

2016-11-29

Filed 2013

Owner

HITACHI HIGH-TECHNOLOGIES CORPORATION

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13859812

Provided is a method that may quickly and simply select the allocation of the type of wafers to the processing chamber having a higher productivity in a semiconductor processing device in which a plurality of conveyance robots is disposed in a conveyance mechanism to which a processing chamber is connected and an object to be processed is delivered between the plurality of conveyance robots, when processings are performed on a plurality of types of wafers in parallel. From the information on the arrangement of the processing chambers of the semiconductor processing device and input type of wafers to be processed, the processing chamber allocation candidate is comprehensively generated and a simulation that manufactures all processing targets for each of the processing chamber allocation candidates is performed to calculate a productivity and the candidates are displayed in the order from a higher productivity to support the adoption of a user.

PlanningG05B 15/02G05B 19/41865G05B 2219/32328G05B 2219/45031Y02P 90/02

AI classification

Planning0.62
Evolutionary computation0.06
Knowledge representation0.03
AI hardware0.02
Natural language0.00
Vision0.00
Speech0.00
Machine learning0.00

Ownership

HITACHI HIGH-TECHNOLOGIES CORPORATION

assignment · 308850443

Assignors

NAKATA, TERUO, NOGI, KEITA, INOUE, SATOMI

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC