INVARIANT CODE OPTIMIZATION IN HIGH-LEVEL FPGA SYNTHESIS

Patent №

US 9,547,738

Granted

2017-01-17

Filed 2014

Owner

ALTERA CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14273295

A method of programming or configuring an integrated circuit device using a high-level language includes parsing a logic flow to be embodied in the integrated circuit device to identify invariant logic flow, converting the invariant logic flow into separate instruction blocks, incorporating the separate instruction blocks into a high-level language representation of a configuration of resources of the integrated circuit device, and compiling the high-level language representation to configure said integrated circuit device. The high-level language representation can be executed to generate a configuration bitstream for the programmable integrated circuit device, or can be run on a processor on the programmable integrated circuit device to instantiate the configuration.

AI hardwareG06F 30/343G06F 8/427G06F 30/327G06F 30/34

AI classification

AI hardware1.00
Natural language0.33
Planning0.02
Machine learning0.01
Vision0.00
Knowledge representation0.00
Speech0.00
Evolutionary computation0.00

Ownership

ALTERA CORPORATION

assignment · 328530737

Assignors

DENISENKO, DMITRY N., FREEMAN, JOHN S.

On an employer assignment, the assignors are typically the inventors.

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