MULTI-STAGE DECODER

A data storage device includes a memory and a decoder. In one embodiment, the decoder includes a bit-flipping stage and a second decoding stage. The decoder is configured to receive data from the memory and to process the received data at the bit-flipping stage to generate first stage result data. The data corresponds to an error correction coding (ECC) codeword of an ECC code. The data is processed at the bit-flipping stage based on parity checks of the error correction code (ECC) code that are not satisfied by the data. The data is processed at the bit-flipping stage without first attempting to decode the received data at the second decoding stage. The decoder is further configured to provide the first stage result data to an input of the second decoding stage and to initiate decoding at the second decoding stage at least partially based on the first stage result data.