MULTIPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES

Patent №

US 9,716,491

Granted

2017-07-25

Filed 2015

Owner

LATTICE SEMICONDUCTOR CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14610127

Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a programmable logic device (PLD) includes a plurality of programmable logic blocks (PLBs) and at least first and second logic cells within at least one of the PLBs, where each logic cell includes a lookup table (LUT) and associated mode logic configured to receive a LUT output signal from the LUT. The associated mode logic is configured to use a single physical signal output to provide a logic cell output signal corresponding to a selected logic function operational mode, ripple arithmetic operational mode, or extended logic function operational mode for each logic cell.

AI hardwareH03K 3/35625G06F 30/327G06F 30/34G06F 30/347H03K 3/356156H03K 19/0016H03K 19/173H03K 19/17728

AI classification

AI hardware1.00
Vision0.01
Evolutionary computation0.00
Knowledge representation0.00
Natural language0.00
Machine learning0.00
Speech0.00
Planning0.00

Ownership

LATTICE SEMICONDUCTOR CORPORATION

assignment · 348580572

Assignors

SHARPE-GEISLER, BRAD, GUNARATNA, SENANI, YEW, TING

On an employer assignment, the assignors are typically the inventors.

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