Patent US 9,720,822

Patent №

US 9,720,822

Granted

Owner

Lab

AI components

2

planning · hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

14856268

In one embodiment, a node coupled to solid state drives (SSDs) of a plurality of storage arrays executes a storage input/output (I/O) stack having a plurality of layers. The node includes a non-volatile random access memory (NVRAM). A first portion of the NVRAM is configured as a write-back cache to store write data associated with a write request and a second portion of the NVRAM is configured as one or more non-volatile logs (NVLogs) to record metadata associated with the write request. The write data is passed from the write-back cache over a first path of the storage I/O stack for storage on a first storage array and the metadata is passed from the one or more NVLogs over a second path of the storage I/O stack for storage on a second storage array, wherein the first path is different from the second path.

PlanningAI hardwareG06F 12/0246G06F 3/0614G06F 3/0655G06F 3/0679G06F 3/0688G06F 11/2094G06F 12/0802G06F 12/0804+11 more

AI classification

AI hardware1.00
Planning0.89
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Natural language0.00
Knowledge representation0.00
Speech0.00
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