UTILIZING PIPELINE REGISTERS AS INTERMEDIATE STORAGE

Patent №

US 9,747,104

Granted

2017-08-29

Filed 2014

Owner

QUALCOMM INCORPORATED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14275047

In one example, a method includes responsive to receiving, by a processing unit, one or more instructions requesting that a first value be moved from a first general purpose register (GPR) to a third GPR and that a second value be moved from a second GPR to a fourth GPR, copying, by an initial logic unit and during a first clock cycle, the first value to an initial pipeline register, copying, by the initial logic and during a second clock cycle, the second value to the initial pipeline register, copying, by a final logic unit and during a third clock cycle, the first value from a final pipeline register to the third GPR, and copying, by the final logic unit and during a fourth clock cycle, the second value from the final pipeline register to the fourth GPR.

AI hardwareG06F 9/3012G06F 9/30032G06F 9/3017G06F 9/3869G06F 9/3875

AI classification

AI hardware0.97
Knowledge representation0.05
Vision0.01
Natural language0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00
Planning0.00

Ownership

QUALCOMM INCORPORATED

assignment · 328700101

Assignors

CHEN, LIN, DU, YUN, UDAYAKUMARAN, SUMESH, ZHANG, CHIHONG, GRUBER, ANDREW EVAN

On an employer assignment, the assignors are typically the inventors.

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