Patent №
US 9,753,084
Granted
2017-09-05
Filed 2015
Owner
FUJITSU LIMITED
Lab
—
AI components
2
kr · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
14751405
A debug circuit, includes: a controller to start a debugging of a circuit based on first and second code values, the first code value obtained by encoding a first sequence included in a processing sequence indicating a condition for a process of the circuit, the second code value obtained by encoding a second sequence subsequent to the first sequence, wherein the controller performs to: calculate a third code value as a current code value based on signals input and output to the circuit; output, as a fourth code value, a previous third code value that is earlier than the current code value; detect the first sequence by comparing a difference between the third code value and the fourth code value with the first code value; calculate a first expected value of the third code value; and perform the process when the third code value and the first expected value match.
AI classification
Ownership
FUJITSU LIMITED
assignment · 361070482
Assignors
TAMIYA, YUTAKA
On an employer assignment, the assignors are typically the inventors.