GRAPHICS PROCESSING SYSTEMS

Patent №

US 9,767,595

Granted

2017-09-19

Filed 2013

Owner

ARM LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13875822

A tile-based graphics processing pipeline 1 comprising a rasteriser 3, a renderer 6, a tile buffer 10, a write out stage 13 and a programmable processing stage 14. The tile buffer 10 stores multiple render targets for a deferred shading operation and the programmable processing stage 14 is operable to, under the control of graphics program instructions, read data from two or more of a set of multiple render targets for a deferred shading operation stored in the tile buffer 10, perform a deferred shading processing operation using the read data, and to write the result of the processing operation to an output render target in the tile buffer 10, or to external memory.

AI classification

AI hardware0.62
Vision0.01
Natural language0.00
Knowledge representation0.00
Evolutionary computation0.00
Machine learning0.00
Planning0.00
Speech0.00

Ownership

ARM LIMITED

assignment · 309260867

Assignors

NYSTAD, JORN, ENGH-HALSTVEDT, ANDREAS, KAKARLAPUDI, SANDEEP, STOKES, MICHAEL

On an employer assignment, the assignors are typically the inventors.

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