Systems and methods to communicate with external destinations via a memory network

Patent №

US 9,781,027

Granted

2017-10-03

Filed 2015

Owner

PARALLEL MACHINES LTD.

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14676937

Various systems and methods to facilitate general communication, via a memory network, between compute elements and external destinations, while at the same time facilitating low latency communication between compute elements and memory modules storing data sets, without impacting negatively the latency of the communication between the compute elements and the memory modules. General communication messages between compute nodes and a gateway compute node are facilitated with a first communication protocol adapted for low latency transmissions. Such general communication messages are then transmitted to external destinations with a second communication protocol that is adapted for the general communication network and which may or may not be low latency, but such that the low latency between the compute elements and the memory modules is not negatively impacted. The memory modules may be based on RAM or DRAM or another structure allowing low latency access by the compute elements.

Machine learningAI hardwareG06F 13/16G06F 15/173H04L 67/1097

AI classification

AI hardware1.00
Machine learning0.89
Knowledge representation0.00
Natural language0.00
Planning0.00
Evolutionary computation0.00
Speech0.00
Vision0.00

Ownership

PARALLEL MACHINES LTD.

assignment · 357610294

Assignors

KHERMOSH, LIOR, BAR-OR, OFER, SHALVI, OFIR, BRAVERMAN, AVNER, ZUCKERMAN, GAL, OREN, EYAL BENJAMIN RAZ

On an employer assignment, the assignors are typically the inventors.

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