Debug in a Multicore Architecture

Patent №

US 9,830,241

Granted

2017-11-28

Filed 2015

Owner

IGNIOS LIMITED

+5 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14822667

A method of monitoring thread execution within a multicore processor architecture which comprises a plurality of interconnected processor elements for processing the threads, the method comprising receiving a plurality of thread parameter indicators of one or more parameters relating to the function and/or identity and/or execution location of a thread or threads, comparing at least one of the thread parameter indicators with a first plurality of predefined criteria each representative of an indicator of interest, and generating an output consequential upon thread parameter indicators which have been identified to be of interest as a result of the said comparison.

AI hardwareG06F 11/263G06F 11/0724G06F 11/2242G06F 11/3409G06F 11/3466G06F 11/348G06F 11/3636

AI classification

AI hardware0.98
Machine learning0.03
Planning0.00
Speech0.00
Natural language0.00
Evolutionary computation0.00
Vision0.00
Knowledge representation0.00

Ownership

IGNIOS LIMITED

assignment · 437050244

COWARE

assignment · 437180788

FUJITSU LIMITED

assignment · 437180788

FUJITSU MICROELECTRONICS LIMITED

assignment · 437300291

SYNOPSYS, INC.

assignment · 438660638

FUJITSU SEMICONDUCTOR LIMITED

namechg · 441270243

Assignors

LIPPETT, MARK DAVID, OUNG, AYEWIN

On an employer assignment, the assignors are typically the inventors.

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