Patent №
US 9,830,272
Granted
2017-11-28
Filed 2013
Owner
INTEL CORPORATION
Lab
—
AI components
1
planning
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13994639
An apparatus is described. The apparatus includes a cache memory having two or more memory blocks and a central processing unit (CPU), coupled to the cache memory, to open a first memory block within the cache memory upon exiting from a low power state.
AI classification
Planning0.63
AI hardware0.08
Natural language0.01
Knowledge representation0.00
Machine learning0.00
Evolutionary computation0.00
Speech0.00
Vision0.00
Ownership
INTEL CORPORATION
assignment · 300130939
Assignors
SORANI, IRIS, NOVAKOVSKY, LARISA, NUZMAN, JOSEPH
On an employer assignment, the assignors are typically the inventors.
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