METHODS AND SYSTEMS FOR HIGH BANDWIDTH CHIP-TO-CHIP COMMUNCATIONS INTERFACE

Patent №

US 9,838,017

Granted

2017-12-05

Filed 2016

Owner

KANDOU LABS, S.A.

Lab

—

AI components

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15176084

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Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values.

AI hardwareH03K 19/018521G06F 13/4282H01L 23/5384H03K 3/037H03K 19/017509H04B 1/40H04L 67/12H10W 70/611+11 more

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AI hardware0.53

Machine learning0.03

Evolutionary computation0.02

Natural language0.01

Vision0.00

Speech0.00

Knowledge representation0.00

Planning0.00

Ownership

KANDOU LABS, S.A.

assignment · 400660987

Assignors

FOX, JOHN, HUNT, PETER, KEAY, JOHN D., SIMPSON, RICHARD, STEWART, ANDREW KEVIN JOHN, SURACE, GIUSEPPE, HOLDEN, BRIAN, SHOKROLLAHI, AMIN, ULRICH, ROGER

On an employer assignment, the assignors are typically the inventors.

From the same owner

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Cites (52)

Bus Reversable Orthogonal Differential Vector Signaling CodesUS 9,432,082 · 2016 SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPROVING MEMORY SYSTEMSUS 9,432,298 · 2016 Clock-Embedded Vector Signaling CodesUS 9,363,114 · 2016 CIRCUITS FOR EFFICIENT DETECTION OF VECTOR SIGNALING CODES FOR CHIP-TO-CHIP COMMUNICATION USING SUMS OF DIFFERENCESUS 9,288,082 · 2016 REDUCING ELECTROMAGNETIC RADIATION EMITTED FROM HIGH-SPEED INTERCONNECTSUS 9,172,412 · 2015 METHODS AND SYSTEMS FOR ERROR DETECTION AND CORRECTION USING VECTOR SIGNAL PREDICTIONUS 9,083,576 · 2015 MULTIPLY ACCUMULATE OPERATIONS IN THE ANALOG DOMAINUS 9,069,995 · 2015 COMMUNICATIONS SYSTEM USING BEAMFORMINGUS 9,020,049 · 2015 POWER AND PIN EFFICIENT CHIP-TO-CHIP COMMUNICATIONS WITH COMMON-MODE REJECTION AND SSO RESILIENCEUS 9,015,566 · 2015 CROSSBAR SWITCH DECODER FOR VECTOR SIGNALING CODESUS 8,989,317 · 2015 ANTIPODAL-MAPPING-BASED ENCODERS AND DECODERSUS 8,949,693 · 2015 NOTIFYING A CONTROLLER OF A CHANGE TO A PACKET FORWARDING CONFIGURATION OF A NETWORK ELEMENT OVER A COMMUNICATION CHANNELUS 8,897,134 · 2014 PARALLEL DATA COMMUNICATIONS MECHANISM HAVING REDUCED POWER CONTINUOUSLY CALIBRATED LINESUS 8,898,504 · 2014 ANTIPODAL DEMODULATION METHOD AND ANTIPODAL DEMODULATOR FOR NON-COHERENT UNITARY SPACE-TIME MODULATION IN MIMO WIRELESS COMMUNICATIONUS 8,879,660 · 2014 FINITE STATE ENCODERS AND DECODERS FOR VECTOR SIGNALING CODESUS 8,718,184 · 2014 METHODS AND SYSTEMS FOR NOISE RESILIENT, PIN-EFFICIENT AND LOW POWER COMMUNICATIONS WITH SPARSE SIGNALING CODESUS 8,649,445 · 2014 MULTI-MODAL OBJECT SIGNATUREUS 8,649,556 · 2014 CHARGE SHARING ANALOG COMPUTATION CIRCUITRY AND APPLICATIONSUS 8,547,272 · 2013 DEVICE FOR EXCHANGING DATA BETWEEN COMPONENTS OF AN INTEGRATED CIRCUITUS 8,520,493 · 2013 RANK MODULATION FOR FLASH MEMORIESUS 8,245,094 · 2012 VIDEO CODING WITH FINE GRANULARITY SCALABILITY USING CYCLE-ALIGNED FRAGMENTSUS 8,233,544 · 2012 METHOD AND APPARATUS OF ENCODING AND DECODING DATA USING LOW DENSITY PARITY CHECK CODE IN A WIRELESS COMMUNICATION SYSTEMUS 8,185,807 · 2012 DESIGN OF SPHERICAL LATTICE CODES FOR LATTICE AND LATTICE-REDUCTION-AIDED DECODERSUS 8,091,006 · 2012 BUS ENCODING/DECODING METHOD AND BUS ENCODER/DECODERUS 8,085,172 · 2011 PARALLEL AND ADAPTIVE SIGNAL PROCESSINGUS 8,055,095 · 2011

and 27 more

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