DYNAMIC BRANCH HINTS USING BRANCHES-TO-NOWHERE CONDITIONAL BRANCH

Patent №

US 9,851,973

Granted

2017-12-26

Filed 2013

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13997828

A processor includes an execution pipeline having one or more execution units to execute instructions and a branch prediction unit coupled to the execution units. The branch prediction unit includes a branch history table to store prior branch predictions, a branch predictor, in response to a conditional branch instruction, to predict a branch target address of the conditional branch instruction based on the branch history table, and address match logic to compare the predicted branch target address with an address of a next instruction executed immediately following the conditional branch instruction. The address match logic is to cause the execution pipeline to be flushed if the predicted branch target address does not match the address of the next instruction to be executed.

AI hardwareG06F 9/3806G06F 9/3005G06F 9/3844G06F 9/3846G06F 9/3848

AI classification

AI hardware1.00
Knowledge representation0.13
Natural language0.02
Evolutionary computation0.00
Machine learning0.00
Planning0.00
Speech0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 279810545

Assignors

FORSYTH, ANDREW T., THOMAS, RENJU, DUPRAT, JEAN-LUC

On an employer assignment, the assignors are typically the inventors.

From the same owner

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