Patent №
US 9,928,071
Granted
2018-03-27
Filed 2009
Owner
AZUL SYSTEMS, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12387477
A system includes a processor configured to: initiate atomic execution of a plurality of instruction units in a thread, starting with a beginning instruction unit in the plurality of instruction units, wherein the plurality of instruction units in the thread are not programmatically specified to be executed atomically; detect an atomicity terminating event during atomic execution of the plurality of instruction units, wherein the atomicity terminating event is triggered by a memory access by another processor; and commit at least some of the one or more memory modification instructions. The system further includes a memory coupled to the processor, configured to provide the processor with the plurality of instruction units.
AI classification
Ownership
AZUL SYSTEMS, INC.
assignment · 228810940
Assignors
TENE, GIL, WOLF, MICHAEL A., CLICK, CLIFF N., JR.
On an employer assignment, the assignors are typically the inventors.