APPARATUS AND METHOD OF PERFORMING A DECIMATION ON A SIGNAL FOR PATTERN DETECTION

Patent №

US 9,954,633

Granted

2018-04-24

Filed 2015

Owner

FREESCALE SEMICONDUCTOR, INC.

Lab

AI components

1

vision

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14830100

The present application relates to a receiver for performing a decimation on a signal for pattern detection and a method of operating thereof. A frequency-domain decimator component and a pattern detector component arranged at the receiver are provided. The frequency-domain decimator component is coupled to at least one antenna to receive an input sequence of samples of the signal received at the at least one antenna. The frequency-domain decimator component is further configured to apply an anti-aliasing filter and to decimate the input sequence. The frequency-domain decimator component is further arranged to output the input sequence filtered and decimated as output sequence. The pattern detector component is coupled to the frequency-domain decimator component to receive the output sequence. The pattern detection component is further configured to perform a pattern detection based on cross-correlation values in frequency domain between the output sequence and predefined patterns.

VisionH04J 11/00H04B 1/707H04L 27/2613H04L 27/2636H04L 27/2663H04L 27/2672H04B 1/0021

AI classification

Vision0.76
Planning0.43
AI hardware0.04
Evolutionary computation0.00
Speech0.00
Machine learning0.00
Natural language0.00
Knowledge representation0.00

Ownership

FREESCALE SEMICONDUCTOR, INC.

assignment · 363620447

Assignors

PRALEA, RADU D.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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