Graph Representation and Embedding for Semiconductor Manufacturing Fab States

Abstract

Due to the enormous complexity of semiconductor manufacturing processes, tasks like performance analysis, forecasting, and production planning and control necessitate detailed knowledge about the current state of the manufacturing system. Usually, models and methods for these tasks incorporate feature selection and engineering to extract relevant feature sets from the vast number of available features. However, sets of independent features may not retain structural information that captures interdependencies between entities. To address this challenge, a graph representation model for semiconductor manufacturing fabs that captures structural information, such as the interdependencies of machines, lots, and routes, is presented. The model comprises the essential procedures in semiconductor manufacturing processes, namely process flows, material transfer, setup, and maintenance activities. Finally, we use representation learning to embed graph snapshots into a low-dimensional space. These embeddings can serve as input for a scheduling engine or a performance analysis tool.