Traditional random-access memory (RAM) includes two main types: Static RAM (SRAM) and Dynamic RAM (DRAM). Leveraging the advantage of high integration density, DRAM has found widespread application in System-on-Chip (SoC) systems. With the advancement of integrated circuit technology, embedded DRAM (eDRAM) has been extensively researched due to its advantages of low latency and high bandwidth, these advantages enable it to have great application potential in fields sensitive to storage performance, such as high-performance computing, high-end smartphones, and artificial intelligence chips. This paper reviews the latest research on high-density eDRAM: in terms of cell structure, 4T/3T1C and other multi-transistor designs and dynamic regulation circuits achieve optimized retention time, area and power consumption; in terms of materials innovation, emerging devices such as AOS/IWO/AsymFET reduce leakage current, achieving quasi-non-volatility and second-level retention time; in terms of circuit design for low power consumption optimization, circuits such as negative voltage bootstrap drive improve energy efficiency, and system-level modeling ensures reliability.
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High-Density Dynamic Random Access Memory Circuit Design
Semantic Scholar · 2026
Abstract
Traditional random-access memory (RAM) includes two main types: Static RAM (SRAM) and Dynamic RAM (DRAM). Leveraging the advantage of high integration density, DRAM has found widespread application in System-on-Chip (SoC) systems. With the advancement of integrated circuit technology, embedded DRAM (eDRAM) has been extensively researched due to its advantages of low latency and high bandwidth, these advantages enable it to have great application potential in fields sensitive to storage performance, such as high-performance computing, high-end smartphones, and artificial intelligence chips. This paper reviews the latest research on high-density eDRAM: in terms of cell structure, 4T/3T1C and other multi-transistor designs and dynamic regulation circuits achieve optimized retention time, area and power consumption; in terms of materials innovation, emerging devices such as AOS/IWO/AsymFET reduce leakage current, achieving quasi-non-volatility and second-level retention time; in terms of circuit design for low power consumption optimization, circuits such as negative voltage bootstrap drive improve energy efficiency, and system-level modeling ensures reliability.