SYSTEMS AND METHODS FOR DYNAMIC RTL MONITORS IN EMULATION SYSTEMS

Patent №

US 10,198,539

Granted

2019-02-05

Filed 2017

Owner

CADENCE DESIGN SYSTEMS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15448436

Systems, methods, and products implementing a dynamic register transfer level (DRTL) monitor are disclosed. The DRTL monitor may be rapidly constructed and implemented in one or more emulator devices during the runtime of the emulation of a device under test (DUT). The systems may receive monitor modules and corresponding monitor instances in high level hardware description language and compile the monitor modules and instances to generate a monitor within the one or more emulator devices. The systems may then connect one or more input ports of the monitor to one or more signal sources in the DUT. The systems may further allow removal of the monitor, addition or more monitors, and/or modification of the monitor during the run time of the emulation of the DUT.

AI hardwareG06F 30/331G06F 30/333

AI classification

AI hardware0.96
Planning0.00
Natural language0.00
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Knowledge representation0.00
Speech0.00

Ownership

CADENCE DESIGN SYSTEMS, INC.

assignment · 414470157

Assignors

LIN, TSAIR-CHIN, GAO, JINGBO, KFIR, ALON, WANG, LONG, ZENG, WEI, LI, ZHAO

On an employer assignment, the assignors are typically the inventors.

From the same owner

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