EMULATION SYSTEM WITH TIME-MULTIPLEXED INTERCONNECT

Patent №

US 5,960,191

Granted

1999-09-28

Filed 1997

Owner

QUICKTURN DESIGN SYSTEMS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08865741

A hardware emulation system is disclosed which reduces hardware cost by time-multiplexing multiple design signals onto physical logic chip pins and printed circuit board. The reconfigurable logic system of the present invention comprises a plurality of reprogrammable logic devices, and a plurality of reprogrammable interconnect devices. The logic devices and interconnect devices are interconnected together such that multiple design signals share common I/O pins and circuit board traces. A logic analyzer for a hardware emulation system is also disclosed. The logic circuits necessary for executing logic analyzer functions is programmed into the programmable resources in the logic chips of the emulation system.

AI hardwareG01R 31/2853G01R 31/31717G06F 30/331Y10S 370/916

AI classification

AI hardware0.80
Machine learning0.01
Natural language0.00
Vision0.00
Speech0.00
Evolutionary computation0.00
Knowledge representation0.00
Planning0.00

Ownership

QUICKTURN DESIGN SYSTEMS, INC.

assignment · 86050931

Assignors

SAMPLE, STEPHEN P., BERSHTEYN, MIKHAIL, BUTTS, MICHAEL R.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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