Patent №
US 10,242,496
Granted
2019-03-26
Filed 2017
Owner
INTEL CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
15494696
Systems, apparatuses and methods may provide a way to subdivide a patch generated in graphics processing pipeline into sub-patches, and generate sub-patch tessellations for the sub-patches. More particularly, systems, apparatuses and methods may provide a way to diverge tessellation sizes to a configurable size within an interior region of a patch or sub-patches based on a position of each of the tessellations. The systems, apparatuses and methods may determine a number of tessellation factors to use based on one or more of a level of granularity of one or more domains of a scene to be digitally rendered, available computing capacity, or power consumption to compute the number of tessellation factors.
AI classification
Ownership
INTEL CORPORATION
assignment · 471230377
Assignors
DOYLE, PETER L., BURKE, DEVAN, MAIYURAN, SUBRAMANIAM, APPU, ABHISHEK R., RAY, JOYDEEP, OULD-AHMED-VALL, ELMOUSTAPHA, LAWS, PHILIP R., KOKER, ALTUG
On an employer assignment, the assignors are typically the inventors.