COMPUTER IMPLEMENTED SYSTEM AND METHOD OF IDENTIFICATION OF USEFUL UNTESTED STATES OF AN ELECTRONIC DESIGN
Patent №
US 10,691,857
Granted
2020-06-23
Filed 2019
Owner
ZIPALOG, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
16358361
A computer program product embodied on a non-transitory computer usable medium includes a sequence of instructions causing at least one processor to execute a method of identification of useful untested states of an electronic design. A computer receives a computer readable representation of said electronic design having at least in one part of said electronic design an analog portion. At least one instrumented netlist is generated based at least in part upon said representation of said electronic design. At least one specification of said electronic design is also received. At least one set of valid states are generated based on said at least one specification. The at least one instrumented netlist is simulated at a behavioral level of said representation of said electronic design at a minimum number of at least one input vector. At least one verification coverage history of said electronic design is generated based in part upon said simulation. Useful untested states are identified based at least in part upon at least one of said at least one specification, said at least one instrumented netlist, said at least one set of valid states and said at least one verification coverage history.
AI classification
Ownership
ZIPALOG, INC.
assignment · 486450181
Assignors
JAMES, FELICIA, KRASNICKI, MICHAEL
On an employer assignment, the assignors are typically the inventors.