DETERMINING AND PREDICTING DERIVED VALUES

Patent №

US 10,754,656

Granted

2020-08-25

Filed 2019

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

Lab

IBM Research

AI components

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

16562959

A predicted value to be used in register-indirect branching is predicted. The predicted value is to be stored in one or more locations based on the prediction. An offset for a predicted derived value is obtained. The predicted derived value is to be used as a pointer to a reference data structure providing access to variables used in processing. The predicted derived value is generated using the predicted value and the offset. The predicted derived value is used to access the reference data structure during processing.

AI hardwareG06F 9/30101G06F 9/3806G06F 9/30054G06F 9/30058G06F 9/30061G06F 9/30098G06F 9/30181G06F 9/32+2 more

Google Patents

AI classification

AI hardware0.60

Knowledge representation0.20

Natural language0.06

Planning0.03

Evolutionary computation0.01

Machine learning0.00

Vision0.00

Speech0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 502930949

Assignors

GSCHWIND, MICHAEL K., SALAPURA, VALENTINA

On an employer assignment, the assignors are typically the inventors.

From the same owner

METRIC LEARNING PREDICTION OF SIMULATION PARAMETERSUS 12,691,869 · 2026 DETERMINATION AND ALLEVIATION OF ROOT CAUSES FOR EMISSION OF POLLUTANTS FROM VEHICLESUS 12,693,686 · 2026 TRAINING AND USING A SENTIMENT MACHINE LEARNING MODULE TO RECEIVE AS INPUT HAPTIC METRIC VALUES TO DETERMINE A SENTIMENT SCORE FOR TEXT TO PROVIDE TO AN INTERACTIVE PROGRAMUS 12,693,779 · 2026 DOMAIN-SPECIFICITY PREDICTION FOR NATURAL LANGUAGE PROCESSINGUS 12,694,208 · 2026 USER INTERFACE AUTOMATION USING NATURAL LANGUAGEUS 12,694,222 · 2026 NATURAL LANGUAGE DATA GENERATION USING AUTOMATED KNOWLEDGE DISTILLATION TECHNIQUESUS 12,694,236 · 2026 NEURAL NETWORK SYSTEMS FOR ABSTRACT REASONINGUS 12,694,281 · 2026 ACCELERATING INFERENCE OF NEURAL NETWORK MODELS VIA DYNAMIC EARLY EXITSUS 12,694,283 · 2026

Cites (40)

ACCESSING GLOBAL DATA FROM ACCELERATOR DEVICESUS 9,513,828 · 2016 REWRITING SYMBOL ADDRESS INITIALIZATION SEQUENCESUS 9,384,130 · 2016 SYSTEM AND METHOD FOR A MULTI-SCHEMA BRANCH PREDICTORUS 9,367,319 · 2016 RELOCATION OF INSTRUCTIONS THAT USE RELATIVE ADDRESSINGUS 9,329,850 · 2016 Prefix Computer Instruction for Compatibly Extending Instruction FunctionalityUS 9,311,093 · 2016 SWITCH STATEMENT PREDICTIONUS 9,298,467 · 2016 TRANSPARENT CODE PATCHING INCLUDING UPDATING OF ADDRESS TRANSLATION STRUCTURESUS 9,244,854 · 2016 REDUCING OVERHEAD IN LOADING CONSTANTSUS 9,189,234 · 2015 USAGE OF TOC REGISTER AS APPLICATION REGISTERUS 9,110,675 · 2015 OPTIMIZING SUBROUTINE CALLS BASED ON ARCHITECTURE LEVEL OF CALLED SUBROUTINEUS 9,075,636 · 2015 METHOD AND APPARATUS FOR REALTIME DETECTION OF HEAP MEMORY CORRUPTION BY BUFFER OVERRUNSUS 8,930,657 · 2015 SYSTEM AND METHOD FOR OPTIMIZING BRANCH LOGIC FOR HANDLING HARD TO PREDICT INDIRECT BRANCHESUS 7,809,933 · 2010 PREDICTION OF DATA VALUES READ FROM MEMORY BY A MICROPROCESSOR USING THE STORAGE DESTINATION OF A LOAD OPERATIONUS 7,788,473 · 2010 USING REGISTER READINESS TO FACILITATE VALUE PREDICTIONUS 7,539,851 · 2009 REDUCING LOAD INSTRUCTIONS VIA GLOBAL DATA REORDERINGUS 7,310,799 · 2007 SYSTEM AND METHOD FOR VALIDATING A MEMORY FILE THAT LINKS SPECULATIVE RESULTS OF LOAD OPERATIONS TO REGISTER VALUESUS 7,263,600 · 2007 DATA SPECULATION BASED ON STACK-RELATIVE ADDRESSING PATTERNSUS 7,089,400 · 2006 SYSTEM AND METHOD FOR LINKING SPECULATIVE RESULTS OF LOAD OPERATIONS TO REGISTER VALUESUS 7,028,166 · 2006 DATA SPECULATION BASED ON ADDRESSING PATTERNS IDENTIFYING DUAL-PURPOSE REGISTERUS 7,024,537 · 2006 SPECULATIVE EXECUTION OF INSTRUCTIONS AND PROCESSES BEFORE COMPLETION OF PRECEDING BARRIER OPERATIONSUS 6,880,073 · 2005 SYSTEM AND METHOD OF USING SPECULATIVE OPERAND SOURCES IN ORDER TO SPECULATIVELY BYPASS LOAD-STORE OPERATIONSUS 6,845,442 · 2005 PIPELINED PROCESSOR EXECUTING LOGICAL OR MATHEMATICAL OPERATION SPECIFYING COMPARE FOLDED BRANCH INSTRUCTIONUS 6,772,323 · 2004 PROCESSOR AND METHOD THAT PREDICT CONDITION REGISTER-DEPENDENT CONDITIONAL BRANCH INSTRUCTIONS UTILIZING A POTENTIALLY STALE CONDITION REGISTER VALUEUS 6,766,442 · 2004 METHOD AND APPARATUS FOR PERFORMING SEQUENTIAL EXECUTIONS OF ELEMENTS IN COOPERATION WITH A TRANSFORMUS 6,715,064 · 2004 MULTIPROCESSOR SPECULATION MECHANISM VIA A BARRIER SPECULATION FLAGUS 6,691,220 · 2004

and 15 more

Related research

Bit-level Perceptron Prediction for Indirect BranchesSemantic Scholar Implemented Static Branch Prediction Schemes for the Parallelism ProcessorsSemantic Scholar LLM Based End-to-end Branch Predictor Optimization GeneratorSemantic Scholar An astute LVQ approach using neural network for the prediction of conditional branches in pipeline processorSemantic Scholar Branch-Target Correlation to Resolve Sub-Trace Aliasing in Dead Block PredictorOpenAlex

Full text

Google Patents