CACHE SYSTEM WITH A PRIMARY CACHE AND AN OVERFLOW CACHE THAT USE DIFFERENT INDEXING SCHEMES
Patent №
US 11,620,220
Granted
2023-04-04
Filed 2015
Owner
VIA ALLIANCE SEMICONDUCTOR CO., LTD.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
14889113
A cache memory system including a primary cache and an overflow cache that are searched together using a search address. The overflow cache operates as an eviction array for the primary cache. The primary cache is addressed using bits of the search address, and the overflow cache is addressed by a hash index generated by a hash function applied to bits of the search address. The hash function operates to distribute victims evicted from the primary cache to different sets of the overflow cache to improve overall cache utilization. A hash generator may be included to perform the hash function. A hash table may be included to store hash indexes of valid entries in the primary cache. The cache memory system may be used to implement a translation lookaside buffer for a microprocessor.
AI classification
Ownership
VIA ALLIANCE SEMICONDUCTOR CO., LTD.
assignment · 369620698
Assignors
EDDY, COLIN, HOOKER, RODNEY E.
On an employer assignment, the assignors are typically the inventors.