CACHE MISS HANDLING FOR READ OPERATIONS IN DATA PROCESSING SYSTEMS

Patent №

US 11,625,332

Granted

2023-04-11

Filed 2020

Owner

ARM LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

16742519

In a data processing system comprising a cache system configured to transfer data stored in a memory system to a processor and vice-versa, a processing unit operable to read data from a cache of the cache system can send a read request for data to the cache. The cache system, in response to the read request, determines whether the requested data is present in the cache. When the requested data is present in the cache, the cache system returns the data from the cache to the processing unit and invalidates the entry for the data in the cache. When the requested data is not present in the cache, the cache system returns an indication of that to the processing unit, without the cache system sending a request for the data towards the memory system.

AI hardwareG06F 12/0891G06F 9/30047G06F 9/542G06F 12/0238G06F 12/04G06F 12/0804G06F 12/0811G06F 12/0893+4 more

AI classification

AI hardware0.92
Evolutionary computation0.01
Knowledge representation0.01
Vision0.00
Machine learning0.00
Planning0.00
Natural language0.00
Speech0.00

Ownership

ARM LIMITED

assignment · 515120603

Assignors

UHRENHOLT, OLOF HENRIK, ENGH-HALSTVEDT, ANDREAS DUE

On an employer assignment, the assignors are typically the inventors.

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