SYSTEM AND METHOD FOR TRACKING MEMORY CORRECTED ERRORS BY FREQUENCY OF OCCURRENCE WHILE REDUCING DYNAMIC MEMORY ALLOCATION

Patent №

US 11,675,645

Granted

2023-06-13

Filed 2021

Owner

Lab

AI components

2

planning · evo

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

17385116

An information handling system includes a processor and a basic input/output system (BIOS). The processor executes an operating system, and detects a corrected error from a memory controller of the information handling system. In response, the processor generates a system management interrupt (SMI). In response to the SMI the BIOS executes a SMI handler. The SMI handler detects a row of the corrected error within a dual inline memory module (DIMM) of the information handling system, and determines whether an entry for the row is located within a hash table. In response to the entry for the row being located within the hash table, the SMI handler increments an error count in a field of the entry for the row. Otherwise, the SMI handler adds a new entry for the row to the hash table, and increments an error count in a field of the new entry for the row.

PlanningEvolutionary computationG06F 11/0772G06F 9/5016G06F 11/076G06F 11/1048G06F 11/1068G06F 11/3037G06F 11/3065

AI classification

Evolutionary computation0.99
Planning0.96
AI hardware0.21
Speech0.03
Vision0.01
Natural language0.00
Machine learning0.00
Knowledge representation0.00
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