Patent US 3,958,221

This invention relates to a method and apparatus for determining the address mode of each instruction in a microprogrammed processor, and for utilizing the address mode determination to locate the effective operand of the instruction. A microprogram memory is included which contains microprogram micro-orders for controlling the obtaining of the effective operand for an instruction in each of the address modes. The address being accessed in the microprogram memory at any given time is stored in a microprogram register. There is a decoder which is operative in response to the address mode tag of an instruction for generating the address of the entry point in the microprogram memory for the microprogram micro-orders to be utilized to control the obtaining of the effective operand for the mode indicated by the tag. The address mode tag of each instruction is applied to the decoder and the microprogram entry point address read out from the decoder in response to the tag is stored in the microprogram register. The storing of the entry point address in the microprogram register initiates the execution of the microprogram micro-orders for the indicated mode, the micro-orders controlling the obtaining of the desired effective operand. The decoder means may also be utilized to obtain a starting address for the operation code microprograms, the operation code being applied to the decoder after the address tag and the resulting starting address being stored in a temporary register until execution of the required micro-orders of the address mode microprogram has been completed.