Patent US 4,133,029

A data processing system constituted by at least two subsystems, each having at least an integrated combinational logic unit comprising a storage and input/output gates and with which at least two control units are connected. The subsystems are constructed using integrated semiconductor techniques. Peripheral units are connected to the input/output gates. The data path between the control units, among one another or between one control unit and the peripheral units, is routed, respectively, over the storage or over the input/output gates to which the relevant peripheral units are connected. The control unit supplies data signals which cause the aforementioned data path to be completed.