A PLURALITY OF PROCESSORS SHARING THE MEMORY, THE ARITHMETIC LOGIC UNIT AND CONTROL CIRCUITRY ALL ON A SINGLE SEMICONDUCTOR CHIP

An electronic digital processing system implemented on a single MOS/LSI semiconductor chip including a ROM for storing instruction codes, a RAM for storing data, an arithmetic logic unit for performing operations on data under control of microinstructions or commands, control circuitry for generating commands in response to the instruction codes in a plurality of central processing units. The fetching of instructions from the ROM, the accessing of data from the RAM, the operation of the arithmetic unit are controlled by the central processing units which share the same data paths that couple the central processing units to the ROM, RAM, arithmetic unit and control circuitry.