Patent US 4,176,780

A program is developed for testing printed circuit boards by applying a proposed test program to a board which is initially in an arbitrary response state, comparing the resulting response pattern with a reference, modifying the proposed program if necessary to obtain a valid comparison, running the program on the board successively while faults are applied to selective board input nodes, determining penetration of the faults through the board by analyzing the toggle signatures of the response nodes, and again modifying the program if necessary. Circuit boards are tested with the resulting program by accumulating a running toggle signature number for selected response nodes as the program is applied to the test board, periodically sampling the numbers, and comparing the test samples with corresponding samples from a reference board. Defective board devices can then be traced and remedied; if a sampled defect persists, the test program is advanced in single step increments from the preceding sample until the defect is again detected. The board connections to the defective node may then be analyzed to pinpoint the defect. The invention also includes apparatus for performing the above method with a programmed data processing means and data storage devices.