PARALLEL ACCESS COMPUTER MEMORY SYSTEM EMPLOYING A POWER-OF-TWO MEMORY MODULES

In a parallel data processing system architecture capable of processing in parallel a plurality of data elements from a linear vector stored in a memory module array having in number a power-of-two memory modules, a high degree of conflict-free access to the stored linear vector data elements is achieved through skewed storage wherein a skewing occurs at every Mth address and a further skewing at every M.sup.2 address wherein M (a power-of-two) is equal to the number of memory modules. The data elements are fetched through a connection network for processing in a processor array having in number a power-of-two processors.