Patent №
US 4,476,548
Granted
1984-10-09
Filed 1982
Owner
HITACHI, LTD., A CORP OF JAPAN
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
06386067
A dynamic type MOS memory device comprises a plurality of word lines, selecting switch MOSFETs which are disposed in correspondence with the respective word lines, a control circuit for controlling the selecting switch MOSFETs, MOSFETs which are disposed between the respective word lines and the ground potential and which are used as resistance means, and an inverter circuit which receives timing signals to be applied to input side electrodes of the selecting switch MOSFETs and which supplies the MOSFETs as the resistance means with control signals for bringing these MOSFETs into "off" states. The timing signal is brought into a supply voltage level substantially in synchronism with the completion of the operation of the control circuit. Accordingly, a dynamic type MOS memory device whose operating speed has been rendered high can be provided.
AI classification
Ownership
HITACHI, LTD., A CORP OF JAPAN
assignment · 42490241
Assignors
MATSUMOTO, TETSUROU, KAZIGAYA, KAZUHIKO
On an employer assignment, the assignors are typically the inventors.