FIELD EFFECT TRANSISTOR LOGIC CIRCUIT HAVING HIGH OPERATING SPEED AND LOW POWER CONSUMPTION

A logic circuit comprising a multi-input NOR gate, a plurality of load field-effect transistors (FET's) and a driving FET, the load FET's and driving FET being connected in series with each other between power sources and the logical output being derived from the connection points of the load FET's and the driving FET. The inputs of the NOR gate are the same as that of the load FET's. The inputs of the NOR gate are connected to the corresponding gates of the load FET's and the output of the NOR gate is connected to the gate of the driving FET.