Patent US 4,510,602

Logic apparatus for presenting results or commanding actions on the basis of furnished informtion. The apparatus includes three distinctive memories which are interrogated cyclically and in synchronism. The first distinctive memory contains instructions, while the second memory contains masking grid signals. The third memory contains pairs of input and output addresses. A logic comparator determines if a prerequisite condition is satisfied and distinctive channels or buses are used for intercommunication. A first bus applies inputs to the comparator, a register or an output unit; a second bus applies grid signals to the comparator, a register, or an output; and a third bus sends addresses to input and output units.