PIPELINE MULTIPLEXER

A pipelined multiplexer is provided for selecting one-of-m input signals, comprising N stages of select elements, each stage of the select elements including 2.sup.n /2 select gates, where n is the stage number. Each select gate has two input terminals and one output terminal for selecting one of two input signals from the input terminals. The selection of an input signal is in response to a corresponding select control signal and the outputting of the respective selected signal is in response to a clocking signal.