PROGRAMMABLE ARRAY LOGIC WITH SHARED PRODUCT TERMS AND J-K REGISTERED OUTPUTS

A programmable logic circuit of the type known as a (programmable array logic) incorporates a J-K register for each of the circuit outputs. The includes a programmable array for generating products of selected input terms. The product terms available at the array outputs can be programmably allocated to either or both of the J and K inputs. The provision of isolating circuitry allows for simultaneous sharing of each product term by both the J and K inputs.