APPARATUS FOR CONTROLLING I/O INTERRUPT IN MULTIPROCESSOR SYSTEM

Patent №

US 4,644,465

Granted

1987-02-17

Filed 1984

Owner

HITACHI, LTD., A CORP OF JAPAN

Lab

—

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

06623086

An apparatus for controlling interrupts is provided in a system controller SC of a multiprocessor system in which a plurality of instruction processors IP share a main storage MS and a channel controller CHC through the system controller SC. The apparatus for controlling interrupts holds I/O interrupt control data for each of the instruction processors IP, and selects the most suitable instruction processor IP to process an I/O interrupt, without receiving responses from all of the instruction processors IP.

AI hardwareG06F 13/26

AI classification

AI hardware0.74

Planning0.10

Machine learning0.06

Vision0.00

Speech0.00

Evolutionary computation0.00

Knowledge representation0.00

Natural language0.00

Ownership

HITACHI, LTD., A CORP OF JAPAN

assignment · 45990039

Assignors

IMAMURA, JIRO

On an employer assignment, the assignors are typically the inventors.

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