SPEECH SYNTHESIZING APPARATUS

A speech synthesizing apparatus has a first memory storing a plurality of phrase data each including speech data, an address designating circuit for designating an address of the first memory, a second memory for storing synthesizing condition data, and a synthesizer for synthesizing a speech signal based on speech data from the first memory in accordance with the synthesizing condition data stored in the second memory. Each phrase data stored in the first memory also includes the corresponding synthesizing condition data. When each phrase data is read out from the first memory, the synthesizing condition data is first read out and is stored in the second memory, and then the speech data is read out and is supplied to the synthesizer.