VIRTUAL-MEMORY MULTIPROCESSOR SYSTEM FOR PARALLEL PURGE OPERATION

Patent №

US 4,733,348

Granted

1988-03-22

Filed 1985

Owner

KABUSHIKI KAISHA TOSHIBA

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

06739156

A virtual memory control multiprocessor system has a plurality of processors each having a translation lookaside buffer (TLB). A purge request source processor commonly supplies a purge request signal to other processors so as to cause them to perform TLB purge operations. A purge end signal sent back from other processors is stored in flip-flops in the source processor in units of processors. The source processor detects the end of TLB purge operations of all processors, in accordance with the statuses of the flip-flops.

AI hardwareG06F 12/1027G06F 12/0842G06F 2212/682

AI classification

AI hardware0.59
Machine learning0.02
Natural language0.01
Knowledge representation0.01
Planning0.01
Vision0.00
Evolutionary computation0.00
Speech0.00

Ownership

KABUSHIKI KAISHA TOSHIBA

assignment · 44110817

Assignors

HIRAOKA, TAKASHI, MATSUSHITA, TOYOHIKO

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC