VECTOR ACCESS CONTROL SYSTEM

A vector access control system for a computer system is provided, including vector registers and a memory access pipeline function unit having an indirect address match checking circuit for detecting a coincidence between data of elements accessed by a plurality of indirect address data. An access to a main storage is carried out by adding a plurality of data, which are read from the vector registers and are necessary for an indirect address access, to a leading address. When a coincidence of data of elements and a resultant conflict between access requests to the main storage is detected by the indirect address match checking circuit, only a predetermined access request in the conflicting access requests is allowed.