SELF-CHECKING VOTING LOGIC FOR FAULT TOLERANT COMPUTING APPLICATIONS

An apparatus and method for providing self-checking voting logic for fault tolerant computing applications. The apparatus comprises a voting circuitry for producing a voting circuit output signal based upon a majority of triplicated logic output signals, unanimous circuitry for producing a unanimous circuit output signal that represents whether or not all of said triplicated logic output signal values are equal or not and self-checking circuitry for monitoring the validity of operation of the voting and the unanimous circuitry as well as said self-checking circuitry itself.