DATA PROCESSOR WITH I/O AREA DETECTION

A device for detecting whether addresses used for accessing in a memory mapped I/O system are present in the I/O area or not is provided. The device includes a mask register for logically ANDing with an incoming address. The output of the ANDing process is exclusive-ORed with an I/O address register. When an operand fetch is made to an I/O area the fetch is suspended during execution of preceding instructions. When the instruction fetch unit seeks an I/O area address, or the address calculation unit seeks an I/O area address, or data is fetched across a boundary of the I/O area, an exception is activated.